This week IBM, Samsung, New York State, and Global Foundries announced a new high capacity silicon chip made with a combination of Silicon and germanium.
Are IBM et al, leading us in the right direction? As the width of connections on chips reach the atomic diameter of the individual atoms of the silicon connectors, EUV etch stations and change in deposition technology are just he tip of the CAPEX impact required to transition and follow the consortium’s lead. At approximately $2B per FAB cost in the near future, who can afford to follow? What ripples in the ecosystem of silicon equipment manufacturing will this cause and at the commodity pricing of today’s market can the ASPs tolerate this new move? Even though Intel mentions 7-Nano occasionally there seems to be no defined roadmap to get there. Consortiums and research are good things. However, we now have to figure out practical steps to get to the future the consortium has described.