As we look at today’s complex product, business and end-user requirements, some key ideas must be addressed to achieve profit margin goals. Almost all electronic products today utilize software, hardware and multiple suppliers/vendors to complete product functionality. The chart below is meant to trigger thinking about key items that must be included in the today’s electronic product engineering process.
To be successful going forward in voice and data communications, companies must be able to integrate the cost benefits of VoIP wire line carrier transmission with cellular/mobile end-user voice and data product suites. E.G., AT&T, COX et al are bundling offerings to increase conglomerate market share. Wireless and Wire line service offerings – previously, large corporations have spent billions of dollars expanding their PSTN network. As mobile and cellular technologies became available (and dominant) additional investments were spent creating the second stage of telecommunications. Today, trends are foretelling the final tale in these under-connected technologies. With the introduction of mobile data communications such as 8.02.11 (Wi-Fi) and 8.02.16 (WiMax), the Next Generation Networks (NGNs) will begin to support both data and voice communications, to a wireless end-user, while taking advantage of the cost-effective VoIP network backbone. Smart Phone carriers have already successfully integrated a VoIP/Wireless package for this product-type powerhouse.
These companies also must be able to saturate their combined products suites into the international origination retail marketplace. As we have seen in the US domestic marketplace, companies are offering bundled services to customers, including:
- Enhanced voice products that are easily integrated into a VoIP switching platform such as voicemail, conference calling, international toll-free, and the personal secretary (follow me number)
- Integration of voice and data products together such as 802.11 wireless hot spot services, local phone services, and cellular (CDMA, GPS) subscriptions.
- Initiatives with strategic partners
A key driver to ride this momentum is the ability to penetrate the market with affordable voice services, then maximize product suites with customer up-sell, using the Internet for advertising, provisioning, and selling, eliminating large personnel infrastructures that have, in the past, proved to be too costly for the PSTN Contribution model shrinking gap. In addition, these marketing plans can be handled virtually from one corporate operating entity, for each geographic/ethnic market segment.
Finally, success will be contingent on companies familiarity with the sensitive balance between Revenues and associated Cost Minutes of Use (CMOUs), while building and maintaining a low-cost ongoing capital expense network.
- Revenue vs. Cost Minutes – Although Operating Margins will continue to decrease by MOU, these declines will be offset by the strong demand for wireless data and voice services, both standard and enhanced, worldwide. The addition of wire line and wireless customers in the less developed countries will gain huge market segment and will produce high Revenue dollar figures until the international accounting recalibration of the industry in these “start up” markets.
Building a low-cost enhanced service network. While VoIP networks have rendered old business models obsolete, it is expected to drive down the cost structure of providing service. By building a MPLS access network for VoIP, Telecom Engineers, Operators, and Technicians are now located virtually, significant reducing operating costs and initiating an increase in service quality. Because large domestic providers have billions of dollars invested in PSTN networks. Understanding that cost reductions will be a necessity to stay competitive, migrating away from PSTN networks to VoIP will produce a large dilemma of instigating and executing an expense plan, with a result in reduced revenues. RBOC and telephone carrier leaders seem to be slightly behind the curve of independent players who are building their model on the future, instead of the past. How these large conglomerates handle this transition and these financial challenges will foretell their viability and future. Simply put tomorrow’s phone company will not be your parents’ phone company.
When we look at the history of the PC industry, we see that while Moore’s Law is fantastic, it is always outpaced by consumer demand. Market expanding software solutions can be developed faster than hardware solutions to develop but are frequently performance constrained by the limits of running on general purpose processors. Eventually IHVs see a large enough market and have time for development of custom silicon to parallelize the process. This lag time between when the problem is first noticed and when it’s solved in silicon can be referred to as the “Wilson Gap” aphras coined by some Microsoft employees who worked with me and quoted my assessment as “Information consumer appetite/demand will always outpace CPU capability” which I stated in a meeting regarding complex computational transforms.
By doing a simple analysis of this “Wilson Gap” over a series of technologies we can see some very interesting patterns:
*Note: This illustration is based on 2011 estimates
The vertical axis represents the number of years a particular technology was on the market in software-only form before it was introduced in silicon as an ASIC (Application Specific Integrated Circuits). Based on this data I would like to postulate that companies like Microsoft & Google have direct bearing on these figures, and that in many cases they can significantly reduce the Wilson Gap. But first, let’s review the situation a little further.
How the SW Industry Fights the Wilson Gap
While the flexibility general purpose CPU offers imaginative engineers the ultimate design surface, it likewise has the inherent limitation that code must be reduced to a lowest common denominator, that being the CPU instruction set. Time and again, this limitation has caused a Wilson Gap in what consumers want and what the PC platform is able to inherently deliver.
For Many of Today’s Needs Moore’s Law is too Slow
As the previous graph illustrates, the Wilson Gap was a limiting factor in the potential market for specific technologies, when the CPU was not fast enough for the consumer demand of floating point operations. Likewise, at various times throughout PC history, the CPU has not kept up with demand for:
- Digital Signal Processing (DSP)
- 3D Graphics
- SSL Processing (encompassing 3DES, RSA, AES)
- MPEGx Encoding/Decoding
- Windows Media Encoding/Decoding
- TCP/IP offloading
- XML Parsing and Canonicalization
ASICs help reduce the Wilson Gap
When Moore’s Law is too slow we traditionally rely on ASICs to fill the Wilson Gap. In all of the examples above (Math Coprocessor, DSP, 3D, 3DES, RSA, MPG, etc…) we now have fairly low-cost ASICs that can solve the performance issue. Total time to solution and time to money are far too long for current industry economic conditions. These (ASIC) processors will typically accelerate a task, off-load a task or perform some combination of the two. But for the remainder of this paper we’ll use the term “accelerate” to include acceleration that encompasses CPU off-loading.
The Downside to ASIC Solutions
Unfortunately ASICs are inherently slow to market and are a very risky business proposition. For example, the typical ASIC takes 8 to 12 months to design, engineer and manufacture. Thus their target technologies must be under extremely high market demand before companies will make the bet and begin the technology development and manufacturing process. As a result, ASICs will always be well behind the curve of information consumer requirements served by cutting edge software.
Another difficulty faced in this market is that ASIC or Silicon Gate development is very complex, requiring knowledge of VHDL or Verilog. The efficient engineering of silicon gate-oriented solutions requires precision in defining the problem space and architecting the hardware solution. Both of these precise processes take a long time.
FPGAs further reduce the Wilson Gap
A newer approach to reducing the Wilson Gap that is gaining popularity is the use of Field Programmable Gate Arrays (or FPGAs). FPGAs provide an interim solution between ASICs and software running on a general purpose CPU. They allow developers to realign the silicon gates on a chip and achieve performance benefits on par with ASICs, while at the same time allowing the chip to be reconfigured with updated code or a completely different algorithm. Modern development tools are also coming on line that reduce the complexity of programming these chips by adding parallel extensions to the C language, and then compiling C code directly to Gate patterns. One of the most popular examples of this is Handel-C (out of Cambridge).
The Downside to FPGA Solutions
Typically FPGAs are 50% to 70% of the speed of an identical ASIC solution. However, FPGAs are more typically geared to parallelize algorithms and are configurable so as to received updates, and leverage a shorter development cycle (http://www.xilinx.com/products/virtex/asic/methodology.htm). These factors combine to extend the lifespan of a given FPGA-based solution further than an ASIC solution.
A Repeating Pattern
Looking at the market for hardware accelerators over the past 20 years we see a repeating pattern of:
- First implemented on the general purpose CPU
- Migrated to ASIC/DSP once the market is proven
Next the technology typically takes one of two paths:
- The ASIC takes on a life of its own and continues to flourish (such as 3D graphics) outside of the CPU (or embedded back down on the standard motherboard)
- The ASIC becomes obsolete as Moore’s Law brings the general purpose CPU up to par with the accelerator by the new including instructions required.
Now let’s examine two well known examples in the Windows space where the Wilson Gap has been clearly identified and hardware vendors are in the development cycle of building ASIC solutions to accelerate our bottlenecks.
Current Wilson Gaps
Our first example is in Windows Media 9 Decoding; ASIC hardware is on its way thanks to companies such as ATI, NVIDIA and others. This will allow the playback of HD-resolution content such as the new Terminator 2 WM9 DVD on slower performance systems. Another example here is in TCP Offload Engines (TOE); which have recently arrived on the scene. Due to the extensibility of both the Windows’ Media and Networking stacks, both of these technologies are fairly straightforward to implement.
Upcoming Wilson Gaps – Our Challenge
However, moving forward the industry faces other technologies which don’t have extensibility points for offloading or acceleration. This lack of extensibility has lead to duplication of effort across various product teams, but not duplication in a competitive sense (which is usually good), but more of a symbiotic duplication of effort, increasing the cost of maintenance and security.
An example of leveraging Cloud Services is to deploy an application that services the healthcare industry by ultilizing the Infrastructure as a Service(IaaS) model E.G., Azure:
- To deploy a Cloud-based Azure Platform meeting HIPAA regulations, all application code segments must be designed using a web-services model where database elements and application code running in the cloud publish secure streams
- Windows Azure allows an organization to create virtual machines (VMs) that run in Microsoft datacenters. Suppose the organization wants to use those VMs to run enterprise applications or other software that will be used by customers. We can create a SharePoint farm in the cloud, for example, or run HIIPA data management enterprise HITECH applications. To make life as easy as possible for our users, these applications would be accessible just as if they were running in an cost intensive local datacenter.
- The Enterprise offering the Cloud Services must follow these five rules in order to stay comliant with HIIPA:
- Transaction & Code Set
- Unique Identifiers (Admin Simplification)
If an enterprise needs to establish a strategic vision that maps out a clear path to an end state vision, then specific action items can be set around well defined targets in:
- Strategy Targets that help expand the footprint of a technology or products
- Process Targets the sheppard teams to accomplish goals and deciplined cycles of activity
- People Targets that help increase productivity and creativity
- Business Targets that set fiscal milestones and performance meterics
- Ecosystem Targets that help stimulate the health and growth of ecosystem partners and fellow travelers.
Below is an example of process targets that help:
Strategic Technology Planning Process
- Review existing technical plans and strategic direction
- Develop a Technology Mission Statement
- Analyze Current raw Data
- Establish Goals and Objectives
- Develop and Implement Project Plans and Timelines (Roadmaps)
- Disseminate, Monitor, Evaluate, Renovate the Technology Plan.
My Conclusion on Si Architecture Trends and thier ecosystem impact
Today’s Si companies must track the key trends in Si technology development, assembly test, Nanotechnology, Cooling, Emerging Research, Virtualization, acceleration and Si Complex Architectures to help drive their product teams in close collaboration with other Si vendors to keep the enterprise in a thought leadership position contemporary with the Silicon Industry along with consumer demands.
This blog is intended to document key technology trends and issues I feel will have a major impact betwen now and 2035. The following areas will be covered:
- Lithography Evolution enables “Moore than Moore”
- Size, Nano-techniques & Subatomic wire
- Cooling via refrigeration or wind
- Cores, components and the Si complex
- Thinner materials E.G., nanotubes & self assembly
- Faster Transistors E.G., Ultrathin Graphene
- Optical Computing, Molecular Computing
- Quantum Computing, Biological Computing
|Integration Level||Components/Chip, Moore’s Law|
|Cost||Cost Per Function|
|Power||Laptop or Cell Battery Life|
|Compactness||Small and Light-weight Products|
|Functionality||Nonvolatile Memory, Imager|
- System Drivers
- Mixed-signal Tech in Wireless Communications
- Emerging Research Devices
- Front End Processes
- Factory Integration, Assembly & Test.